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From Vitalik Buterin's post regarding "On Mining", he mentions:

The second approach is somewhat different: create a mechanism for generating new hash functions, and make the space of functions that it generates so large that the kind of computer best suited to processing them is by definition completely generalized, ie. a CPU. This approach gets close to being “provably ASIC resistant” and thus more future-proof, rather than focusing on specific aspects like memory...

My question is how would such a mechanism work and how might it be implemented or realized?

What's unclear to me is how can you have a PoW mechanism that's able to just create new never-before-seen hash functions on its own and somehow have all the nodes on the network derive this hashing algorithm in an independent, trustless manner? A second major concern is how can you be sure that this derived algorithm is even cryptographically secure?

Note, I found a similar question here. But there is a crucial difference: that question is in regards to picking from a finite set of predefined cryptographically vetted hash functions and changing their call orders dynamically. The method Vitalik is suggesting, the mechanism is deriving a new hash function that never existed before and using that as the PoW function for a given block at that point in time.

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Even though i'm a beginner in everything that concerns cryptocurrencies, please let me propose a guess, that others more prepared will correct. The idea is that an ASIC is a very specialized piece of hardware, dedicated to a single algorithm. If you keep changing the algorithm, there will be no way to create an ASIC that will mimick it; to implement such an algorithm, you'd have to use a piece of hardware so generalized that it would have to be a CPU.

  • My question isn't about what makes this ASIC resistant because that's obvious. My question is how can something like this be implemented. Even a simple example to illustrate. So this response doesn't answer my question. – greatwolf Feb 17 '15 at 21:26
  • Dear @greatwolf, that is a matter of implementation technique and would certainly need serious studies to see what ASIC designers can't do. But a guess would be to use a hash function that was the concatenation of many different hash functions, maybe randomly selected. As long as their number was large enough, it would not be economically feasible to implement all of them in hardware. It`s important to mention that Vitalik's proposal doesn't really exclude such an alternative. – hgfernan Feb 17 '15 at 22:00

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